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Verilog HDL (2nd Edition)
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Author: Samir Palnitkar
List Price: $82.00
Our Price: Click to see the latest and low price
ISBN: 0130449113
Publisher: Prentice Hall PTR (21 February, 2003)
Edition: Hardcover
Sales Rank: 70,641
Average Customer Rating: 3.62 out of 5
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Customer ReviewsRating: 5 out of 5
The Best Verilog Book for Beginners
This book starts from very basic knowledge of Verilog. It assumes no prior knowledge of the language. It starts from explaining the different data types of Verilog with very clear examples. Then it shows you how to create a module and why is it important to divide your design into several modules. Then it teaches you how to create a circuit at gate level modeling. The schematics of the the code is given in the book, so you can clearly see the relationship between the schematics and its corresponding Verilog code. Then it moves to data flow modeling, again with very clear examples. After that, it moves to Behavioral Modeling. This the only book that gives me a very good understanding of always block, initial block, reg data type, and most importantly blocking and non blocking assignment. It has excellent example of how to create a state machine. The rest of the book teach you some tips that will make it easier for you to write your code. It also has some very good examples of how to create a testbench. Almost every example has its own testbench. So, you will learn how to create a testbench as you read the book from the very beginning. I only have 2 complains of the book. One is it doesn't tell you which part of the language is synthesizable until near the end of the book. Second is it doesn't tell you which part of the examples is the new features in Verilog 2001. This could be problematic if your simulator and synthesis tool does not fully support Verilog 2001. But other than that, I am fully satisfied. When I first learned Verilog, I browsed many other books. And this one is absolutely the best one. Without this book, I won't be able to finish my projects ahead of time with an A+. Good job Mr. Palnitkar!
Rating: 4 out of 5
Excellent
An excellent book for a beginner like me. The first few chapter explains, the flow of the language-and helps you get a good hold.wonderful book, highly recommended.
Rating: 1 out of 5
Buy the 1st edition
I looked at this book to learn Verilog 2001. This book is not it. The book doesn't cover the most basic constructs of Verilog 2001 such as always @(*) and the reduced verbosity of entity declarations. Also, the author does not cross-reference a feature with what standard supports it. This makes it worthless as a reference for both the new and old standard. If you want to learn Verilog 2001, wait for a better book. If you want to learn the old standard, buy his 1st edition.
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