Verilog Designer's Library

Author: Bob Zeidman
List Price: $89.00
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ISBN: 0130811548
Publisher: Prentice Hall PTR (15 June, 1999)
Edition: Hardcover
Sales Rank: 95,101
Average Customer Rating: 3.86 out of 5

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Customer Reviews

Rating: 5 out of 5
Excellent book on verilog
Bob's "Verilog Designer's Library" is an excellent book for
verilog programmers. It does help me much. Every example in
this book is very practical to engineers. I like it.


Rating: 4 out of 5
Some Good Points
This book is good for beginners, it has a few good ideas in it. The Behavioral vs. RTL versions of the code is pretty useless, but the RTL vs. Simulation versions are useful. Getting a quick and dirty unit test bench up and running is a good idea. But DO NOT USE THE ASYNCHRONOUS FIFO. It does not work. If you are crossing clock boundaries, this is not the way to do it!


Rating: 5 out of 5
The reviews about Verilog Designer's Library
This book reviews the the Verilog Coding Technique in part one. It introduces the Genearl Coding, Behavioral Coding, and RTL coding technique. It makes reader understand how important the coding technique is. This book also explains synthesis issue and simulation issue. After these chapters introduction, the basic building block, state machines, some complex functions, error dection and correction, memory controller Verilog behaviour code and RTL code are introduced in further chapter. This book is for whom has a basic familiarity with Verilog language. It is very useful and valuable for hardware designer,hardware system engineer and student.

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