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Verilog Styles for Synthesis of Digital Systems
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Author: David R Smith, Paul D Franzon
List Price: $86.00
Our Price: Click to see the latest and low price
ISBN: 0201618605
Publisher: Prentice Hall (15 January, 2001)
Edition: Hardcover
Sales Rank: 287,023
Average Customer Rating: 3.67 out of 5
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Customer ReviewsRating: 1 out of 5
Very vague and broad
I was very excited when I saw this book hoping it'd open me all of the secrets of not-known-until-now world of HDL Synthesis. How wrong I was. The title is very misleading, the book spends just a few pages on synthesis. Overall, this book might be useful for a novice, but even for me, an undergrad ECE major, it turned out to be almost useless. It contains minimum of factual information, often outdated(and this is critical in the ECE world), and only slightly touches the surface on a number of topics it tries to cover. I think the authors whould have concentrated on something specific, instead of giving "what happened in Computer Engineering in last 15 years" review.
Rating: 5 out of 5
Excellent Treatment of Verilog and PLD Methodology
I have been a user of VHDL for the last three years and am now beginning to use Verilog, mostly because I am now doing ASIC development. For the new Verilog user, this book is excellent because it covers the gamut for an HDL and FPGA designer -- the syntax of the language,the difference between structural and behavioral constructs, simulation, hierarchical design, and of course the ubiqituous State Machine. Also included are some sections on targeting different types of technology, including standard cell. I found this book quite useful compared to other Verilog books I have purchased.
Rating: 5 out of 5
One of the Best Verilog books to learn from
I have been searching for an Verilog book that will allow me to get up to speed quickly for an particular project. I wanted something that presented the syntax of the language in an clear manner but more importantly would give me an methodology to allow me to use Verilog in the design of an FPGA. This book seems to have "the right stuff". This book along with "Verilog HDL" by Samir Palnitkar seem to be the best that I have seen for learning Verilog
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